Nehalem CPU Die Show

Isso não é novidade, a Intel já anunciou há algum tempo a "stacked memory".

Na teoria até podias fazer stack de CPU's, mas a dissipação térmica dos layers inferiores seria um problema.
Stacked Memory tem como principal vantagem eliminar o tamanho das connecções e consequentemente o desperdício de die nessa função, mas vai aumentar os custos de produção.
E n é só a Intel k está a estudar essa opção.
 
De facto é estranho esta separação L2 e L3 dedicadas e não L2 dedicada e L3 partilhada. Vai abandonar a ideia dos Core 2 Duo de ter a cache partilhada, mas talvez pelo facto de ter o controlador de memória e "northbridge" integrado, logo todas as comunicações são dentro do CPU, evitando a latência do chipset externo (o grande problema dos Pentium D e até nos quads actuais que a comunicação entre as 2 dies é feito externamente).

Um pormenor que ninguem notou, o core em si tem o DOBRO da área que os 2,5 MB de cache L2 e L3 :wow:

Nos core 2 duo "conroe", a área do core é sensivelmente igual a metade da cache (2 MB)

Core_2_Duo_Conroe_die.jpg


Provavelmente vem com toneladas de novidades no que toca a capacidade de processamento e IS adicional.
 
Se aquela análise do core do Nehalem estiver correcta, é muito estranho, principalmente por a L3 estar separada. Não faz muito sentido. Faria mais sentido aquilo tudo ser L2 partilhada como no Core 2.

Outra coisa que me faz confusão é o o tamanho do quad core.
Se o quad tem 265mm2 (o que já é bastante), um octo-core, teria 530 mm2!!. A não ser que cortem algo.
 
Se aquela análise do core do Nehalem estiver correcta, é muito estranho, principalmente por a L3 estar separada. Não faz muito sentido. Faria mais sentido aquilo tudo ser L2 partilhada como no Core 2.

Tb é estranho a cache L2 estar na vertical, quando fazia mais sentido estar na horizontal perto do core (se bem k está coerente com a die shot).
 
Nehalem looks set to deliver a real big performance jump

SO, THE EARLY QX9770 desktop Yorkfield Extreme part was trying hard to come close to 6GHz here yesterday under deep freeze. And now we know the equivalent unlocked top-bin "enthusiast" Xeon for Skulltrail and similar boards (there is expected to be more than one board supporting unlocked dual-socket Xeons this year, not just Skulltrail) will be called QX9775. This is basically a "no holds barred" version of the X5482 3.2GHz FSB1600 part.

These - obviously - are fast parts and, with a few more steppings coming along over the next six months, Intel got that frequency headroom to something like 4GHz under normal operating conditions, something confirmed to us this morning by a very large Taiwan OEM.

So, how much will the Nehalem be faster than the already oh-so-fast Penryn, focusing specifically on the core IPC single thread performance? I asked Kirk Skaugen, Intel's Digital Enterprise Group VP and GM of Server Platforms Group.

Kirk is always friendly, even to the point of having had a fun chat during the previous Taipei IDF on how great it would have been if Nvidia actually did come out with a dual socket Xeon Nforce SLI chipset - which it didn't up to now - so I expected a fun answer this time too.

Well, no fun here - he didn't want to comment on the CPU core-specific performance expectations beyond the well known integrated memory controllers and interconnects. But he did say that the CPU core performance jump from the same process Core 2 (Penryn) to Nehalem would be higher than the jump for Netburst to Core 2 itself.

Since that last jump was pretty substantial - big enough to turn around the market situation and put AMD in a lot of further trouble, I'm curious how far would Nehalem go then.

If we compare the initial top Core 2 launch part, the 2.93GHz Conroe, vs 3.73GHz Presler, the last Netburst part in the same process, we're talking a speed increase between 30 per cent. And over 80 per cent right there and then, depending on what you run - I'm not counting some of those rare benchmarks where the difference was more than double.

Let's say, putting it conservatively, that the last extreme Penryn (Harpertown and Yorkfield) part is a 3.6GHz FSB1600 one in, say, April-May 2008, and that the first Nehalem, TylersburgDP platform, comes some two to three months later.

If it really provides a speed-up not even greater, but just similar to the 30-80 per cent jump seen above in the Presler-Conroe move, we'll have a speed champion on hand. Even the highest end Power6 parts, in DP configs at least, would have a bit of paranoia about this one. Just think the Harpertown benchmarks scaled to 3.6GHz, then multiplied by 1.3 to 1.8 depending on the case.

And, remember, Captain Kirk, the Intel veep, said, that jump WILL be higher. I'm looking forward to my first TylersburgDP experience then.

On a lighter note, a rumour circulated here that AMD mistakenly delivered 500 of its new CPU parts to one customer but forgot the charge. Intel wags promptly suggested it was the largest AMD delivery they heard of this year to date.

http://www.theinquirer.net/gb/inquirer/news/2007/10/16/idf-taipei-nehalem-real-big

Bastante interessante o comentário a bold. Talvez demasiado optimista.

Demo do Nehalem nesta IDF - http://video.google.com/videoplay?docid=-1675046152840399165&hl=en
 
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