Samsung 7EUV, PCI-e 5, DDR4/5
https://www.servethehome.com/ibm-power10-searching-for-the-holy-grail-of-compute/
A apresentação completa está na harwareluxx, mas como é uma publicação alemã
https://www.hardwareluxx.de/index.p...ssoren/ibm-power10-press-conference-deck.html
EDIT:
Hot Chips 2020 Live Blog: IBM's POWER10 Processor on Samsung 7nm (10:00am PT)
We get up to 120 threads per chip but that is only a small part of what is happening here. We also get new AI boots, new faster OMI instead of DDR signaling for future memory connectivity, faster PowerAXON for a flexible interconnect, and PCIe Gen5 for general-purpose connectivity. Overall, this is a lot new, so we wanted to unpack what this means at a core, then at a system level.
Something you may notice is that there are 16x SMT8 cores as well as 128MB of L3 cache yet IBM quotes a maximum of 15 core die with 120MB of L3 cache. For yield purposes, IBM is effectively expecting to use 15 of the 16 cores and 8MB L3 chunks.
The core advancements are cool, but where IBM POWER10 gets exciting is its external connectivity and scalability. Using its PowerAXON technology, systems can scale to 4x dual-chip module sockets or 16x single-chip sockets.
https://www.servethehome.com/ibm-power10-searching-for-the-holy-grail-of-compute/
A apresentação completa está na harwareluxx, mas como é uma publicação alemã
https://www.hardwareluxx.de/index.p...ssoren/ibm-power10-press-conference-deck.html
EDIT:
Hot Chips 2020 Live Blog: IBM's POWER10 Processor on Samsung 7nm (10:00am PT)
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